PIC18LF46J11-I/ML【PDF 16/32 页】IC PIC MCU FLASH 64K 2V 44-QFN

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3854

12页 13页 14页 15页 [16页]17页 18页 19页 20页

2009 Microchip Technology Inc.

DS39687E-page 23

PIC18F2XJXX/4XJXX FAMILY

TABLE 5-6:

PIC18F47J13 AND PIC18F47J53 FAMILY DEVICES: CONFIGURATION BITS AND

DEVICE IDs

WPFP<5:0>

CONFIG4L

Write/Erase Protect Page Start/End Location bits

Used with WPEND bit to define which pages in Flash will be write/erase-protected.

WPDIS(5)

CONFIG4H

Write Protect Disable bit

1 = WPFP<5:0>, WPEND and WPCFG bits ignored; all Flash memory may be erased or

written

0 = WPFP<5:0>, WPEND and WPCFG bits enabled; write/erase-protect active for the

selected region(s)

DEV<2:0>

DEVID1

Device ID bits

Used with the DEV<10:3> bits in the Device ID Register 2 to identify the part number.

REV<4:0>

DEVID1

Revision ID bits

Indicate the device revision.

DEV<10:3>

DEVID2

Device ID bits

Used with the DEV<2:0> bits in the Device ID Register 1 to identify the part number.

File Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default/

Unprogrammed

Value(1)

300000h CONFIG1L

DEBUG

XINST

STVREN CFGPLLEN

PLLDIV2

PLLDIV1

PLLDIV0

WDTEN

111- 1111

300001h CONFIG1H

—(2)

—(4)

CP0

CPDIV1(3)

CPDIV0(3)

---- 0111

300002h CONFIG2L

IESO

FCMEN

CLKOEC SOSCSEL1 SOSCSEL0

FOSC2

FOSC1

FOSC0

1111 1111

300003h CONFIG2H

—(2)

WDTPS3

WDTPS2

WDTPS1

WDTPS0

---- 1111

300004h CONFIG3L DSWDTPS3 DSWDTPS2 DSWDTPS1 DSWDTPS0 DSWDTEN DSBOREN

RTCOSC DSWDTOSC

1111 1111

300005h CONFIG3H

—(2)

MSSPMSK

PLLSEL

ADCSEL

IOL1WAY

---- 1111

300006h CONFIG4L

WPCFG

WPFP6

WPFP5

WPFP4

WPFP3

WPFP2

WPFP1

WPFP0

1111 1111

300007h CONFIG4H

—(2)

LS48MHZ(3)

—

WPEND

WPDIS

---- 1-11

3FFFFEh DEVID1

DEV2

DEV1

DEV0

REV4

REV3

REV2

REV1

REV0

xxxx xxxx

3FFFFFh DEVID2

DEV10

DEV9

DEV8

DEV7

DEV6

DEV5

DEV4

DEV3

0101 10xx

Legend:

x = unknown, u = unchanged, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.

Note

Values reflect the unprogrammed state as received from the factory and following Power-on Resets. In all other Reset states, the

configuration bytes maintain their previously programmed states.

The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it is

accidentally executed.

These bits are not implemented in PIC18F47J13 family devices.

This bit should always be maintained at ‘0’.

TABLE 5-5:

PIC18F46J11 AND PIC18F46J50 FAMILY DEVICES: BIT DESCRIPTIONS (CONTINUED)

Bit Name

Configuration

Words

Description

Note 1: The Configuration bits can only be programmed indirectly by programming the Flash Configuration Word.

2: The Configuration bits are reset to ‘1’ only on VDD Reset; it is reloaded with the programmed value at any device Reset.

3: These bits are not implemented in PIC18F46J11 family devices.

4: Once this bit is cleared, all the Configuration registers which reside in the last page are also protected. To disable code

protection, perform an ICSP Bulk Erase operation.

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式